Cadence Allegro And OrCAD (Including ADW) Version 17.00.00

Cadence Design Systems, Inc., a leader in global electronic design innovation, launched the Cadence Allegro and OrCAD 17.0 design solution with new features, enhanced customization capabilities, and simulation performance improvements that provide customers a shorter, more predictable path to product creation.

17.0, as with all major dot zero releases, contains a number of architectural changes that will have an adoption overhead for customers, such as 64Bit only operating system, database changes that require a database update and a new library padstack structure. Through discussions with customers around the world we have learned that a 2015 mandatory update to 17.0 may require more preparation at some customer sites. Therefore the OrCAD and Allegro management team have decided to create and release a new feature packed 2015 version of 16.6 (16.6-2015) that will deliver new OrCAD and Allegro products as well as new functionality tiering of the OrCAD and Allegro base PCB products and pull forward some of the key 17.0 features such as Shape Edit application mode. This new 16.6-2015 release is being planned for June’2015. Therefore 17.0 is being re-positioned as a limited access Early Adopter Program (EAP) release, available and supported for production work for those companies using Allegro who want/need to move to a 64Bit operating system and/or begin to take advantage of the new database Padstack support. With the new feature-rich 16.6-2015 release we do not expect a large number of customers will want to upgrade to 17.0.

About Cadence Design Systems, Inc.

Cadence enables global electronic design innovation and plays an essential role in the creation of today’s integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry.

Name: Cadence Allegro and OrCAD (Including ADW)
Version: (64bit) 17.00.000
Home: www.cadence.com
Interface: english
OS: Windows 7even / 8 (All service packs, such as Windows 8.1)

 

Altium Designer 15.0.15 (2015)

Altium Limited, a global leader in Electronic Design Automation, native 3D PCB design systems (Altium Designer) and embedded software development toolkits (TASKING), announced the release of its professional printed circuit board (PCB) and electronic system level design software, Altium Designer 15.

Altium Designer 15 demonstrates the continuing commitment by Altium to produce software and solutions that increase productivity and reduce user stress during challenging electronics design projects. It reflects Altium’s commitment to supporting customer success by delivering products that customers both want and need. In keeping with these objectives, Altium Designer 15 includes powerful new enhancements for designing the next generation of high-speed printed circuit boards, and keeping up with the leading trends in industry with support for new fabrication output standards.

High Speed Signal Pin Pairs

Modern designs require signal propagation at rates up to 100 gigabits per second. Designing to these specifications in previous generation design software is challenging. This process traditionally required manual rework and careful signal planning outside of the design tool, typically in a spreadsheet program – causing additional steps and introducing lots of room for errors. With Altium Designer 15 a new Pin Pairs feature has been added to:

- Enable accurate length and phase tuning across termination components.
- Enable length, phase and delay tuning traversing an entire signal path.

Designers will no longer require external software or have to maintain complex lists of signals and nets, but instead will be able to plan and route groups of high speed nets with much greater efficiency and accuracy.

IPC-2581 and Gerber X2 Support

As a Computer Aided Manufacturing format, traditional Gerber has its origins in standard RS-274D published almost 35 years ago; many consider “standard Gerber” to be out of date. Ucamco have recently updated RS-274X to Gerber X2 to incorporate critical fabrication data previously missing, and the International Printed Circuit association has developed an entirely new standard, IPC-2581. Both resolve issues of ambiguous or missing data encountered when using older formats such as Gerber RS-274X to hand off design to fabrication, completely describing a PCB according to its design:

- Copper layer images.
- Plated and unplated holes, slots, routes, grooves and microvias.
- PCB design outline and cutout regions.
- Complex layer stack regions.
- Rigid and flexible board areas.
- Material specifications.
- Fabrication notes, tolerances, and other critical standards-compliance information.

Altium Designer 15 introduces support for both IPC-2581 and Gerber X2, keeping designers up to date while giving them a choice that broadens their selection of PCB fabrication partners.

Along with additional new features and ongoing maintenance based on solid customer feedback, Altium Designer 15 will enhance electronics engineering workflow and reduce communication bottlenecks between designers and manufacturers.

About Altium Ltd.

Altium Limited is an Australian multinational software corporation that focuses on 3D PCB design, electronics design and embedded system development software.

Altium Designer, a unified electronics design environment links all aspects of smart systems design in a single application that is priced as affordable as possible. With this unique range of technologies Altium enables electronics designers to innovate, harness the latest devices and technologies, manage their projects across broad design ‘ecosystems’, and create connected, intelligent products.

Name: Altium Designer
Version: 15.0.15 build 41991

Tanner EDA Tools version 16.01

Tanner EDA, the catalyst for innovation and leader for design, layout and verification of analog and mixed-signal (A/MS) integrated circuits (ICs) and (ASICs), has released an update of Tanner Tools 16. This release includes L-Edit, DRC, SPR, Extract, LVS, HiPer Verify, T-Spice, W-Edit, S-Edit and other tools and add-ins.

Tanner EDA tools for analog and mixed-signal ICs and MEMS design offers designers a seamless, efficient path from design capture through verification. Our powerful, robust tool suite is ideal for applications including Power Management, Life Sciences / Biomedical, Displays, Image Sensors, Automotive, Aerospace, RF, Photovoltaics, Consumer Electronics and MEMS.

About Tanner EDA

Tanner EDA provides a complete line of EDA software solutions that drive innovation for the design, layout and verification of analog and mixed-signal (A/MS) integrated circuits (ICs) and MEMS. Customers are creating breakthrough applications in areas such as power management, displays and imaging, automotive, consumer electronics, life sciences, and RF devices. A low learning curve, high interoperability, and a powerful user interface improve design team productivity. Tanner EDA is the price/performance leader and the industry alternative for a complete design flow, improving total cost of ownership (TCO) and reducing EDA tool expense for its global customers. Capability and performance are matched by unparalleled customer support as well as an ecosystem of partners that bring advanced capabilities to A/MS designs.

Founded in 1988, Tanner EDA solutions deliver just the right mixture of features, functionality and usability. The company has shipped over 33,000 licenses of its software to more than 5,000 customers in 67 countries.

Name: Tanner EDA Tools
Version: (64bit) 16.01
Home: www.tannereda.com
Interface: english
OS: Windows XP / Vista / Seven

Synopsys FPGA Synthesis Products H-2013.03

Synopsys, Inc., a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, presents its Synplify Pro and Synplify Premier FPGA synthesis tools.

Synopsys Synplify FPGA design software provides a high-quality, high-performance, and easy-to-use FPGA implementation and debug environment. Designers using Synopsys’ FPGA tool suite gain fast time-to-results for complex FPGAs, area optimization for both cost and power reduction, automation for soft error mitigation, hierarchical design capabilities and multi-FPGA vendor support. The Synplify Pro and Synplify Premier FPGA design tools provide additional value by offering links to high-performance functional verification with VCS simulation and integration with Synphony Model Compiler for high-level synthesis of signal processing hardware.

More info: http://www.synopsys.com/Tools/FPGASynthesis/

About Synopsys

Synopsys, Inc. accelerates innovation in the global electronics market. As a leader in electronic design automation (EDA) and semiconductor IP, Synopsys delivers software, IP and services to help engineers address their design, verification, system and manufacturing challenges. Since 1986, engineers around the world have been using Synopsys technology to design and create billions of chips and systems.



Name: Synopsys FPGA Synthesis Products
Version: H-2013.03
Home: http://www.synopsys.com
Interface: english
OS: Windows XP / Vista / Seven / 8
Size: 1.0 Gb

Multisim & Ultiboard (Circuit Design Suite) PowerPro 13.0.1 (x86x64) - from National Instruments

Circuit Design Suite - one of the most popular in the world of designing electronic circuits , characterized by a combination of professional capabilities and simplicity, extensibility functions from simple desktop systems to corporate network systems . This explains the widespread use of this remarkable program for training purposes and for industrial production of complex electronic devices.
To facilitate the development process , National Instruments provides an opportunity for all developers of electrical circuits and printed circuit boards, professors and students to join in the online community NI Circuit Design Community. On this resource you can share your sketches, prototypes , patterns , and discuss various nuances of the development with colleagues around the world . Using the capabilities of NI Circuit Design Community. you can get access to resources that will significantly simplify the process of creating and implementing your projects .

Extras. Information : National Instruments has released new versions of software packages NI Multisim and NI Ultiboard. Recent versions have increased functionality, new user interface and supports more than 300 new components from leading manufacturers. With our new design and prototyping of electrical circuits can be carried out much more quickly and with greater accuracy .

In Circuit Design Suite 13.0.1 fixed:
Multisim ( 30)
Bug ID Description
351776 Printing in Black and White removes text.
383,114 Hyphen in model name prevents table view of SPICE parameters.
448013 Cannot unpack projects to another drive location other than where it was created from.
451958 Adding a model from a component can cause mapping errors.
453679 RefDes sometimes becomes incorrect after gate swaps and gate optimizations from the Advanced RefDes configuration dialog.
452928 Annotation sometimes does not find a specific footprint and will pick an incorrect footprint instead.
351727 Editing a selection font, changes font of all components placed after it.
451442 Swapping sections with different models for a multisection component will lead to errors.
443556 Netlist view window sometimes does not display data after selecting regenerate netlist.
366729 Pasting different connector types with the same name to a new design renames the connectors.
447805 Swapping RefDes’s using Advanced RefDes Configuration will sometimes produce duplicate RefDes’s.
358433 The lock subcircuit restriction does not seem to apply to hierarchical blocks.
429068 In a multisection component, changing its footprint pinout breaks mappings for any sections from there on.
439226 Ladder diagram fails to simulate due to large resistor in NC and NO contacts.
445183 Unable to replace the footprint of an interactive component from the spreadsheet view.
440274 Multisim Full edition should not have the Model Maker button active.
445770 Back annotating to Multisim when a component is not found in the database will sometimes lead to a crash.
443648 DC operating point failure fallback method sometimes produces inconsistent results.
443867 Cannot replace a multisection component after the third attempt.
443230 Netlist errors when one section of a component doesn’t have a model.
274991 The size of a model seems to affect the time it takes to open its property window.
274589 Component wizard does not warn user if. Subckt is not terminated with. Ends.
442364 RefDes duplication sometimes happens after component replace.
441098 Interactive DC sources sometimes do not preserve slider position on import.
423563 SVG circles are always imported with radii multiple of 3 with OECL import.
429474 Negative temperature coefficient for a resistor is causing simulation error.
438559 Sometimes Multisim is unable to edit the user fields for a corporate database.
274687 Multisim does not import OrCAD file correctly sometimes.
435191 IRAM section of MCU memory view is not being displayed properly.
422,933 Multisim cannot communicate with some boards using Xilinx ISE 12.4.
Ultiboard ( 19)
Bug ID Description
456570 Some landpattern changes in Ultiboard sometimes do not correctly backannotate to Multisim.
456503 3D DXF files do not export board thickness correctly.
452986 NC Drill settings are not restored from scheme file if NC drill window is open.
453023 Cancelling netlist editor dialog makes hidden changes to grouped net settings.
453286 Net settings for clearances does not always properly adhered to.
450388 Ultiboard design file sometimes gets corrupted after importing a bitmap file.
450425 Ultiboard security copy file sometimes gets overwritten by a corrupt file.
449740 Trace width changes in Net Group dialog not working for Edu, Full or Student tiers.
447448 Forward annotating a file with a ground net may sometimes lead to a crash.
443872 Unable to ungroup a group comprising of only attributes.
443838 Number of layers in the place powerplane dialog box doesn’t match the design toolbox.
447750 A DRC is not generated whenever a trace crosses a round board outline and a net.
442363 Text attributes disappear when multiple text attributes are grouped together.
440757 Gerber files are sometimes being exported incorrectly due to default imperial precisions.
439841 DXF data doesn’t appear on the workspace when the ‘closed polyline to polygon “is checked.
439868 Creating a rounded rectangle custom pad image with modified xy coordinates will not show it properly once placed.
440292 Autorouter sometimes does not work correctly with custom pads.
443226 Swapping layers no longer auto deleting vias.
406117 Confusing Labels In Select Groups for Replica Place Dialog.

Procedure for installation and registration
1.Zapuskaem setup.exe (or autorun.exe) – install Circuit Design Suite 13.0.1 using a key generator of NI License Activator 1.2.exe
For this generator “options” -> “Generate Serial Number …”
2.For activation programs after they are installed, right-click on the “Power Pro Edition” -> “Activate …”
procedure done 2 times: for Multisim 13.0.1 & Ultiboard 13.0.1

Year / Issue Date : 2014
Version : 13.0.1 Build 13.0.995.0
Developer : National Instruments Electronics
Bit depth : 32bit, 64bit
Language: English
Medicine: Present
Circuit Design Suite 13.0.1 supports:
Windows 8/7/Vista 32 -bit and 64 -bit editions, Windows XP 32 -bit edition, Windows Server 2003 R2 ( 32 -bit) and Windows Server 2008 R2 ( 64 -bit).
Circuit Design Suite 13.0.1 Unsupported :
Windows 2000/NT/Me/98/95, Windows XP 64 -bit edition, or the Windows Server non-R2 editions.

EveryCircuit 2.02 (ANDROID ONLY)

MuseMaze | November 26, 2013 | Education | Android | .apk | 4.9 Mb
All joking aside, this time you will understand how electronic circuits work.

Build any circuit, tap play button, and watch dynamic voltage, current, and charge animations. This gives you insight into circuit operation like no equation does. While simulation is running, adjust circuit parameters with analog knob, and the circuit responds to your actions in real time. You can even generate an arbitrary input signal with your finger!

That’s interactivity and innovation you can’t find in best SPICE tools for PC like Multisim, LTspice, OrCad or PSpice (trademarks belong to their respective owners).

EveryCircuit 2.02

EveryCircuit is not just an eye candy. Under the hood it packs custom-built simulation engine optimized for interactive mobile use, serious numerical methods, and realistic device models. In short, Ohm’s law, Kirchhoff’s current and voltage laws, nonlinear semiconductor device equations, and all the good stuff is there.

Growing library of components gives you freedom to design any analog or digital circuit from a simple voltage divider to transistor-level masterpiece.

Schematic editor features automatic wire routing, and minimalistic user interface. No nonsense, less tapping, more productivity.

Simplicity, innovation, and power, combined with mobility, make EveryCircuit a must-have companion for high school science and physics students, electrical engineering college students, breadboard and printed circuit board (PCB) enthusiasts, and ham radio hobbyists.

Join EveryCircuit cloud community to store your circuits on cloud and access them from any of your Android devices. Explore public community circuits and share your own designs. The app requires a permission to access your account for authentication in EveryCIrcuit community.

Thanks to Prof. N. Maghari for technical discussions, feedback, and help with designing circuit examples.

Features:
+ Growing public library of community circuits
+ Animations of voltage waveforms and current flows
+ Animations of capacitor charges
+ Analog control knob adjusts circuit parameters
+ Automatic wire routing
+ Oscilloscope
+ Seamless DC and transient simulation
+ Single play/pause button controls simulation
+ Saving and loading of circuit schematic
+ Mobile simulation engine built from ground-up
+ Shake the phone to kick-start oscillators
+ Intuitive user interface
+ No Ads

Components:
+ Sources, signal generators
+ Controlled sources (VCVS, VCCS, CCVS, CCCS)
+ Resistors, capacitors, inductors, transformers
+ Potentiometer, lamp
+ Switches, SPST, SPDT
+ Diodes, Zener diodes, light emitting diodes (LED)
+ MOS transistors (MOSFET)
+ Bipolar junction transistors (BJT)
+ Ideal operational amplifier (opamp)
+ Digital logic gates, AND, OR, NOT, NAND, NOR, XOR, XNOR

Next:
+ More components

What’s New
Support of Intel x86 CPU architecture
Fixed an issue in user registration

Additional information
Updated November 26, 2013
Size Varies with device
Current Version Varies with device
Requires Android Varies with device
Content Rating Everyone

CadSoft Eagle Professional 7.1 Multilingual

EAGLE (Easily Applicable Graphical Layout Editor) is an ECAD program produced by Cadsoft in Germany. It is very commonly used by private electronics enthusiasts, because there is a very usable free demo version for nonprofit use and is available in English and German. Cadsoft has released versions for Microsoft Windows, Linux, and Mac OS X. EAGLE provides a schematic editor, for designing circuit diagrams and a tightly integrated PCB layout editor, which automatically starts off with all of the components required by the schematic. Components are manually arranged on the board, with the help of coloured lines showing the eventual connections between pins that are required by the schematic, to aid in finding a placement that will allow the most efficient track layout.

It also provides a good autorouter, which once the components have been placed will attempt to automatically find an optimal track layout to make the electrical connections. It does not always manage to find a way of routing all the signals, although it permits manual routing of critical paths such as power and high frequency lines before letting the autorouter handle the other connections.



EAGLE is very popular with hobbyists because the free demo is able to create usable PCBs. (Free ECADs from some companies are crippled so that they won’t save or won’t print.) The only limitations of boards made with the EAGLE demo are: 2 copper layers; a maximum size of 80mm x 100mm (½ Eurocard)(~3in x ~4in). The demo version of the schematic editor module can only create single-sheet schematics.

The licensing structure for the commercial version is very flexible. In order to use the demo version to make commercial products, it must be licensed for $49 USD. If more is needed, it is also possible to license the required extra modules (schematic capture, layout, autorouter) separately and simply purchase more if needs change.

CadSoft Eagle Professional

OS : Windows 7 / Vista / XP / 8
Language : English

Home Page - http://www.cadsoftusa.com/

CadSoft Eagle Professional 7.1

Cadence Allegro Sigrity 16.62

Cadence Design Systems, Inc. released an updated version Cadence Sigrity 6.62, with technologies provide the signal integrity and power analysis solutions needed for system-level verification and interface compliance.

Increases in IC speed, faster data transmission rates, smaller geometries, and an emphasis on optimization have made power and signal integrity issues tightly connected. To address these issues, designers need advanced power integrity and power-aware signal integrity tools. This level of technology allows designers to see the complete picture and achieve signoff-level verification through their analysis. Mistakes are not an option on projects this advanced, that’s why designers choose proven Sigrity solutions, from Cadence.

By adopting Sigrity solutions, designers can perform three major tasks of the design verification process:

- Analyze the complete power delivery system across chips, packages, and boards.
- Perform system-level signal integrity (SI) analysis, including simultaneous switching noise analysis of high-speed signal transmissions.
- Utilize the advanced physical design tools for single and multi-chip packages, state-of-the-art 3D packages, and systems-in-package (SiPs).

What’s New in 16.62

ASIS 16.62 introduces three new products to the Allegro Sigrity Product Line:

- Allegro Sigrity PI Base
The Allegro Sigrity PI Base is a complement to the Allegro Sigrity SI Base (PA5700) in that it utilizes the Allegro canvas for viewing and casual editing of Allegro PCB, Package, or SiP files. PI Base provides first order Power Integrity checks to be performed. The tool is meant to be used either by designers who need to seek guidance during the layout process, or by Power Integrity experts, who need a quick answer, and understand the confidence level that can be applied with the first-order analysis.

- Allegro Sigrity Signoff and Optimization Option
The Allegro Sigrity Power Integrity Signoff and Optimization Option integrates with PI Base to provide expert-level power integrity analysis on top of an editing canvas that allows for the design to be changed and reanalyzed in an integrated fashion. This Option includes the ability to run all of these Sigrity tools (one at a time) either directly from the PI Base (PA5800) or as a point tool: PowerDC, OptimizePI, PowerSI, 3D-EM, CAD Translators

- IO-SSO Analysis Suite
The IO-SSO Analysis Suite is a specific group of model creation and analysis tools that provides the ability to accurately simulate a group of parallel bus nets that are switching simultaneously. For example, a DDR3 data bus could have as many as 64 simultaneous switching signals. The noise on the power and ground planes, known as simultaneous switching noise (SSN), must be accurately characterized to understand if the data will always be reliable. This suite of tools provides all the functionality required for modeling chip, package, and PCB from die to die. The simulation tool provided understands modern memory interface protocols (such as DDR3/DDR4) and points out violations to the electrical specification for those standard protocols. This Suite includes the ability to run all of these Sigrity tools (one at a time) as a point tool: T2B, XcitePI Extraction, XtractIM, PowerSI, Broadband SPICE, SystemSI – PBA, CAD Translators

Cadence Allegro Sigrity 16.62
About Cadence Design Systems, Inc.

Cadence enables global electronic design innovation and plays an essential role in the creation of today’s integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry.

About Sigrity

Sigrity develops and globally supports advanced software analysis solutions to ensure power integrity and signal integrity in chips, packages and printed circuit boards; and physical design tools for single die and SiP implementations. Over 250 companies utilize Sigrity products as part of industry standard design flows and with layout tools from Cadence, Mentor Graphics, Zuken and other EDA suppliers. Sigrity solutions help companies overcome design challenges to reduce costly respins and get to market faster.

Over 60% of Sigrity’s 100+ employees are in research and development positions creating breakthrough solutions targeting real-world challenges.

Name: Cadence Allegro Sigrity
Version: 16.62.002
Home: www.cadence.com
Interface: english
OS: Windows Seven / 8
System Requirements: Preinstall Cadence SPB 16.60.016 or above