National Instruments Design Suite V14.0 (Electronic Circuits Design)

National Instruments Corporation, the provider of platform-based systems that enable engineers and scientists to solve the world's greatest engineering challenges, announced the release of Circuit Design Suite 14.0, is a suite that can be effectively used for the circuit designing.

The NI Circuit Design Suite combines NI Multisim and Ultiboard software for a complete circuit design, simulation, validation, and layout platform.

Multisim is an intuitive environment for circuit design. With advanced mixed-mode simulation and validation, this software offers professional tools for your research and prototyping. And using a comprehensive library of components, you can easily build and validate circuit behavior.



Ultiboard is a flexible PCB layout and routing environment. Easily transfer completed Multisim schematics to Ultiboard and layout, route, and export completed designs for fabrication.

NI Circuit Design Suite 14.0
About National Instruments

Since 1976, National Instruments has equipped engineers and scientists with tools that accelerate productivity, innovation and discovery. NI’s graphical system design approach to engineering provides an integrated software and hardware platform that speeds the development of any system needing measurement and control. The company’s long-term vision and focus on improving society through its technology supports the success of its customers, employees, suppliers and shareholders.

Cadence Allegro And OrCAD (Including ADW) Version 17.00.00

Cadence Design Systems, Inc., a leader in global electronic design innovation, launched the Cadence Allegro and OrCAD 17.0 design solution with new features, enhanced customization capabilities, and simulation performance improvements that provide customers a shorter, more predictable path to product creation.

17.0, as with all major dot zero releases, contains a number of architectural changes that will have an adoption overhead for customers, such as 64Bit only operating system, database changes that require a database update and a new library padstack structure. Through discussions with customers around the world we have learned that a 2015 mandatory update to 17.0 may require more preparation at some customer sites. Therefore the OrCAD and Allegro management team have decided to create and release a new feature packed 2015 version of 16.6 (16.6-2015) that will deliver new OrCAD and Allegro products as well as new functionality tiering of the OrCAD and Allegro base PCB products and pull forward some of the key 17.0 features such as Shape Edit application mode. This new 16.6-2015 release is being planned for June’2015. Therefore 17.0 is being re-positioned as a limited access Early Adopter Program (EAP) release, available and supported for production work for those companies using Allegro who want/need to move to a 64Bit operating system and/or begin to take advantage of the new database Padstack support. With the new feature-rich 16.6-2015 release we do not expect a large number of customers will want to upgrade to 17.0.

About Cadence Design Systems, Inc.

Cadence enables global electronic design innovation and plays an essential role in the creation of today’s integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry.

Name: Cadence Allegro and OrCAD (Including ADW)
Version: (64bit) 17.00.000
Home: www.cadence.com
Interface: english
OS: Windows 7even / 8 (All service packs, such as Windows 8.1)

 

Altium Designer 15.0.15 (2015)

Altium Limited, a global leader in Electronic Design Automation, native 3D PCB design systems (Altium Designer) and embedded software development toolkits (TASKING), announced the release of its professional printed circuit board (PCB) and electronic system level design software, Altium Designer 15.

Altium Designer 15 demonstrates the continuing commitment by Altium to produce software and solutions that increase productivity and reduce user stress during challenging electronics design projects. It reflects Altium’s commitment to supporting customer success by delivering products that customers both want and need. In keeping with these objectives, Altium Designer 15 includes powerful new enhancements for designing the next generation of high-speed printed circuit boards, and keeping up with the leading trends in industry with support for new fabrication output standards.

High Speed Signal Pin Pairs

Modern designs require signal propagation at rates up to 100 gigabits per second. Designing to these specifications in previous generation design software is challenging. This process traditionally required manual rework and careful signal planning outside of the design tool, typically in a spreadsheet program – causing additional steps and introducing lots of room for errors. With Altium Designer 15 a new Pin Pairs feature has been added to:

- Enable accurate length and phase tuning across termination components.
- Enable length, phase and delay tuning traversing an entire signal path.

Designers will no longer require external software or have to maintain complex lists of signals and nets, but instead will be able to plan and route groups of high speed nets with much greater efficiency and accuracy.

IPC-2581 and Gerber X2 Support

As a Computer Aided Manufacturing format, traditional Gerber has its origins in standard RS-274D published almost 35 years ago; many consider “standard Gerber” to be out of date. Ucamco have recently updated RS-274X to Gerber X2 to incorporate critical fabrication data previously missing, and the International Printed Circuit association has developed an entirely new standard, IPC-2581. Both resolve issues of ambiguous or missing data encountered when using older formats such as Gerber RS-274X to hand off design to fabrication, completely describing a PCB according to its design:

- Copper layer images.
- Plated and unplated holes, slots, routes, grooves and microvias.
- PCB design outline and cutout regions.
- Complex layer stack regions.
- Rigid and flexible board areas.
- Material specifications.
- Fabrication notes, tolerances, and other critical standards-compliance information.

Altium Designer 15 introduces support for both IPC-2581 and Gerber X2, keeping designers up to date while giving them a choice that broadens their selection of PCB fabrication partners.

Along with additional new features and ongoing maintenance based on solid customer feedback, Altium Designer 15 will enhance electronics engineering workflow and reduce communication bottlenecks between designers and manufacturers.

About Altium Ltd.

Altium Limited is an Australian multinational software corporation that focuses on 3D PCB design, electronics design and embedded system development software.

Altium Designer, a unified electronics design environment links all aspects of smart systems design in a single application that is priced as affordable as possible. With this unique range of technologies Altium enables electronics designers to innovate, harness the latest devices and technologies, manage their projects across broad design ‘ecosystems’, and create connected, intelligent products.

Name: Altium Designer
Version: 15.0.15 build 41991

Tanner EDA Tools version 16.01

Tanner EDA, the catalyst for innovation and leader for design, layout and verification of analog and mixed-signal (A/MS) integrated circuits (ICs) and (ASICs), has released an update of Tanner Tools 16. This release includes L-Edit, DRC, SPR, Extract, LVS, HiPer Verify, T-Spice, W-Edit, S-Edit and other tools and add-ins.

Tanner EDA tools for analog and mixed-signal ICs and MEMS design offers designers a seamless, efficient path from design capture through verification. Our powerful, robust tool suite is ideal for applications including Power Management, Life Sciences / Biomedical, Displays, Image Sensors, Automotive, Aerospace, RF, Photovoltaics, Consumer Electronics and MEMS.

About Tanner EDA

Tanner EDA provides a complete line of EDA software solutions that drive innovation for the design, layout and verification of analog and mixed-signal (A/MS) integrated circuits (ICs) and MEMS. Customers are creating breakthrough applications in areas such as power management, displays and imaging, automotive, consumer electronics, life sciences, and RF devices. A low learning curve, high interoperability, and a powerful user interface improve design team productivity. Tanner EDA is the price/performance leader and the industry alternative for a complete design flow, improving total cost of ownership (TCO) and reducing EDA tool expense for its global customers. Capability and performance are matched by unparalleled customer support as well as an ecosystem of partners that bring advanced capabilities to A/MS designs.

Founded in 1988, Tanner EDA solutions deliver just the right mixture of features, functionality and usability. The company has shipped over 33,000 licenses of its software to more than 5,000 customers in 67 countries.

Name: Tanner EDA Tools
Version: (64bit) 16.01
Home: www.tannereda.com
Interface: english
OS: Windows XP / Vista / Seven

Multisim & Ultiboard (Circuit Design Suite) PowerPro 13.0.1 (x86x64) - from National Instruments

Circuit Design Suite - one of the most popular in the world of designing electronic circuits , characterized by a combination of professional capabilities and simplicity, extensibility functions from simple desktop systems to corporate network systems . This explains the widespread use of this remarkable program for training purposes and for industrial production of complex electronic devices.
To facilitate the development process , National Instruments provides an opportunity for all developers of electrical circuits and printed circuit boards, professors and students to join in the online community NI Circuit Design Community. On this resource you can share your sketches, prototypes , patterns , and discuss various nuances of the development with colleagues around the world . Using the capabilities of NI Circuit Design Community. you can get access to resources that will significantly simplify the process of creating and implementing your projects .

Extras. Information : National Instruments has released new versions of software packages NI Multisim and NI Ultiboard. Recent versions have increased functionality, new user interface and supports more than 300 new components from leading manufacturers. With our new design and prototyping of electrical circuits can be carried out much more quickly and with greater accuracy .

In Circuit Design Suite 13.0.1 fixed:
Multisim ( 30)
Bug ID Description
351776 Printing in Black and White removes text.
383,114 Hyphen in model name prevents table view of SPICE parameters.
448013 Cannot unpack projects to another drive location other than where it was created from.
451958 Adding a model from a component can cause mapping errors.
453679 RefDes sometimes becomes incorrect after gate swaps and gate optimizations from the Advanced RefDes configuration dialog.
452928 Annotation sometimes does not find a specific footprint and will pick an incorrect footprint instead.
351727 Editing a selection font, changes font of all components placed after it.
451442 Swapping sections with different models for a multisection component will lead to errors.
443556 Netlist view window sometimes does not display data after selecting regenerate netlist.
366729 Pasting different connector types with the same name to a new design renames the connectors.
447805 Swapping RefDes’s using Advanced RefDes Configuration will sometimes produce duplicate RefDes’s.
358433 The lock subcircuit restriction does not seem to apply to hierarchical blocks.
429068 In a multisection component, changing its footprint pinout breaks mappings for any sections from there on.
439226 Ladder diagram fails to simulate due to large resistor in NC and NO contacts.
445183 Unable to replace the footprint of an interactive component from the spreadsheet view.
440274 Multisim Full edition should not have the Model Maker button active.
445770 Back annotating to Multisim when a component is not found in the database will sometimes lead to a crash.
443648 DC operating point failure fallback method sometimes produces inconsistent results.
443867 Cannot replace a multisection component after the third attempt.
443230 Netlist errors when one section of a component doesn’t have a model.
274991 The size of a model seems to affect the time it takes to open its property window.
274589 Component wizard does not warn user if. Subckt is not terminated with. Ends.
442364 RefDes duplication sometimes happens after component replace.
441098 Interactive DC sources sometimes do not preserve slider position on import.
423563 SVG circles are always imported with radii multiple of 3 with OECL import.
429474 Negative temperature coefficient for a resistor is causing simulation error.
438559 Sometimes Multisim is unable to edit the user fields for a corporate database.
274687 Multisim does not import OrCAD file correctly sometimes.
435191 IRAM section of MCU memory view is not being displayed properly.
422,933 Multisim cannot communicate with some boards using Xilinx ISE 12.4.
Ultiboard ( 19)
Bug ID Description
456570 Some landpattern changes in Ultiboard sometimes do not correctly backannotate to Multisim.
456503 3D DXF files do not export board thickness correctly.
452986 NC Drill settings are not restored from scheme file if NC drill window is open.
453023 Cancelling netlist editor dialog makes hidden changes to grouped net settings.
453286 Net settings for clearances does not always properly adhered to.
450388 Ultiboard design file sometimes gets corrupted after importing a bitmap file.
450425 Ultiboard security copy file sometimes gets overwritten by a corrupt file.
449740 Trace width changes in Net Group dialog not working for Edu, Full or Student tiers.
447448 Forward annotating a file with a ground net may sometimes lead to a crash.
443872 Unable to ungroup a group comprising of only attributes.
443838 Number of layers in the place powerplane dialog box doesn’t match the design toolbox.
447750 A DRC is not generated whenever a trace crosses a round board outline and a net.
442363 Text attributes disappear when multiple text attributes are grouped together.
440757 Gerber files are sometimes being exported incorrectly due to default imperial precisions.
439841 DXF data doesn’t appear on the workspace when the ‘closed polyline to polygon “is checked.
439868 Creating a rounded rectangle custom pad image with modified xy coordinates will not show it properly once placed.
440292 Autorouter sometimes does not work correctly with custom pads.
443226 Swapping layers no longer auto deleting vias.
406117 Confusing Labels In Select Groups for Replica Place Dialog.

Procedure for installation and registration
1.Zapuskaem setup.exe (or autorun.exe) – install Circuit Design Suite 13.0.1 using a key generator of NI License Activator 1.2.exe
For this generator “options” -> “Generate Serial Number …”
2.For activation programs after they are installed, right-click on the “Power Pro Edition” -> “Activate …”
procedure done 2 times: for Multisim 13.0.1 & Ultiboard 13.0.1

Year / Issue Date : 2014
Version : 13.0.1 Build 13.0.995.0
Developer : National Instruments Electronics
Bit depth : 32bit, 64bit
Language: English
Medicine: Present
Circuit Design Suite 13.0.1 supports:
Windows 8/7/Vista 32 -bit and 64 -bit editions, Windows XP 32 -bit edition, Windows Server 2003 R2 ( 32 -bit) and Windows Server 2008 R2 ( 64 -bit).
Circuit Design Suite 13.0.1 Unsupported :
Windows 2000/NT/Me/98/95, Windows XP 64 -bit edition, or the Windows Server non-R2 editions.

HDL Works HDL Desing Entry EASE 8.1 R6 for Windows

EASE offers the best of both worlds with your choice of graphical or text based HDL entry. You don’t need to be a master of either Verilog or VHDL. When you’re creating a new design, just enter your design using your mix of graphics and text. EASE automatically generates optimized HDL code for you in the selected language – VHDL or Verilog. Industry standard version control environments deal with design and configuration management enabling multiple users to work simultaneously on one EASE project.

Features & Benefits
- Graphical design environment with automated generation of hierarchical VHDL or Verilog code
- Push-button import of legacy Verilog or VHDL designs and extraction of graphical hierarchy
- Adheres to state of the art Windows look and feel for intuitive operation
- Standards compliant (IEEE-1076-87&93 VHDL and IEEE-1364 Verilog)
- True multi-user design environment and associated version control, managed by a sophisticated design environment browser
- Integrates smoothly with the industry’s most popular simulators and synthesis tools
- Platform independent database
- Integrated HDL language editor
- Hot error reporting

Project Browser
The Project Browser provides a good overview and offers easy access to the design elements. The browser offers three views: the Database View shows a tree of all elements in your project, the File View shows all HDL files in the project and their status and the Hierarchical View shows the HDL hierarchy of your project. It also provides many status details of the different objects, like verification status, ‘instantiated from’ info, version number and more. From the browser, all objects can be opened in their respective editor (block, state, truth table or text editor).

The Hierarchical View shows the hierarchy on the selected entity, module or configuration. It allows you to create or delete configurations. Here you can also changes the binding of an architecture to a component when having multiple architectures for an entity.

Block Diagram Editor
The block diagram editor allows you to easily decompose your system into functional blocks. It is up to you how detailed you want to make the decomposition. Each block can be implemented using one of the four available editors. Facilitating an abstraction level between block diagrams and plain HDL code, the block diagram editor allows you to graphically represent VHDL processes or Verilog always statements. They can be implemented using state diagrams, truth tables or HDL text. This approach visualizes the data flow inside a single diagram.



State Diagram Editor
The state diagram editor supports Moore, Mealy and mixed state machines. Any valid VHDL expression or Verilog statement can be used to define actions and transition conditions. Transitions can be synchronous or asynchronous; outputs can be clocked or combinatorial. The state diagram editor supports a variety of state assignment methods, including binary, gray, one-hot and two-hot. User defined assignment is also supported. The generated HDL is optimized for time and area to achieve the best possible synthesized design from leading synthesis tools.

Truth Table Editor
The truth table editor is useful for decoders and decision logic. The spreadsheet like editor in combination with a flexible and smart use of column headers allows a compact visualization of the intended behavior. A column-fill wizard is available to generate data in various encoding styles and representations.

Scriptum™ – Internal Text Editor
EASE comes complete with its own integrated HDL language editor, Scriptum. Even on extremely large files Scriptum offers exceptionally fast editing capabilities. You can avoid typing errors and dramatically improve your productivity by using keyword and header templates, identifier repeat, auto case conversion and one-touch line and column manipulation. To keep your text highly readable and well structured, you may choose syntax coloring and in- and out-commenting of selected text, as well as line numbering and indentation. Scriptum offers extensive documentation capabilities such as color coding, capitalization and indentation to make your numerous lines of code more readable. Scriptum is fully customizable to create a design environment that meets your needs. Design language, synthesis templates, keyword templates, and user interface are easily tailored to your requirements.

Integrating external HDL
External HDL files like IP, legacy code, Matlab code and FPGA generated models can be integrated in your project as external objects. EASE will create symbols and component declarations for instantiated modules. Symbols can be easily updated to the latest version of your code. Existing HDL can also be translated into block diagrams. Symbol libraries for FPGA primitives can be created on the fly from vendor VHDL or Verilog descriptions.

Verification and Linting
Before VHDL or Verilog is generated EASE verifies the design for inconsistencies and syntax errors. Linting is an additional verification effort to find potential design problems (like range mismatches in assignments of vectors, or read-only signals) and optimizes the design by identifying unused signals and definitions. Errors, warnings and notes are reported in the verification pane. The messages are hot-linked to the corresponding editor to quickly navigate to the offending code.

Many FPGA’s and ASIC’s are designed by a team of engineers that need to work closely together to finish the implementation correct and on time. The best way to work together on a project is by using a design environment that allows a group of designers to simultaneously work on the project without interfering with each other. EASE supports team based design using industry standard version management systems like RCS, CVS, ClearCase and Subversion. All designers in the team can check-in/check-out objects at the entity/module level. This fine grain control allows you to edit the parts that you need to work on while your colleagues can still read these parts.

3rd Party Interfacing
EASE has a user configurable third party tool flow interface. A wizard will help the user to select the appropriate tools and set the options for these tools. Extra tool buttons will be added to the GUI for easy access to the selected tools. A list of tools supported by default is provided below. Other tools or vendors are easily added through the Tcl interface.

Simulation tools:
- ModelSim (Model Technology’s )
- NCSim, Verilog-XL (Cadence)
- Xilinx ISIM
- Silos (Silvaco)
- Riviera (Aldec)
- VCS (Synopsys)

Synthesis tools:
- Altera Quartus
- Synplify (Synplicity)
- Precision
- Xilinx ISE

The FPGA Vendor tools from:
- Actel
- Altera
- Xilinx

HTML Generator
The HTML Generator allows you to export the whole project on your intranet or to the internet. With a single click EASE will export all diagrams, side data, generated HDL code and the project structure to the desired location in HTML and SVG files. SVG (Scalable Vector Graphics) is the W3C standard XML-based imaging model started by Adobe. Graphics created in SVG can be scaled without loss of quality across various platforms and devices. The exported HTML contains hot links in the diagrams and the project structure to easily navigate through your design.

Standards Support
EASE’s code generator produces HDL output conforming to IEEE-1076-87 and IEEE-1076-93 VHDL standards, as well as the IEEE-1364 Verilog standard. EASE also supports the industry’s leading simulators and synthesis tools, as well as version control features when provided.

Homepage - http://www.hdlworks.com/products/ease/index.html

HDL Works HDL Desing Entry EASE 8.1 R6 for Windows

EveryCircuit 2.02 (ANDROID ONLY)

MuseMaze | November 26, 2013 | Education | Android | .apk | 4.9 Mb
All joking aside, this time you will understand how electronic circuits work.

Build any circuit, tap play button, and watch dynamic voltage, current, and charge animations. This gives you insight into circuit operation like no equation does. While simulation is running, adjust circuit parameters with analog knob, and the circuit responds to your actions in real time. You can even generate an arbitrary input signal with your finger!

That’s interactivity and innovation you can’t find in best SPICE tools for PC like Multisim, LTspice, OrCad or PSpice (trademarks belong to their respective owners).

EveryCircuit 2.02

EveryCircuit is not just an eye candy. Under the hood it packs custom-built simulation engine optimized for interactive mobile use, serious numerical methods, and realistic device models. In short, Ohm’s law, Kirchhoff’s current and voltage laws, nonlinear semiconductor device equations, and all the good stuff is there.

Growing library of components gives you freedom to design any analog or digital circuit from a simple voltage divider to transistor-level masterpiece.

Schematic editor features automatic wire routing, and minimalistic user interface. No nonsense, less tapping, more productivity.

Simplicity, innovation, and power, combined with mobility, make EveryCircuit a must-have companion for high school science and physics students, electrical engineering college students, breadboard and printed circuit board (PCB) enthusiasts, and ham radio hobbyists.

Join EveryCircuit cloud community to store your circuits on cloud and access them from any of your Android devices. Explore public community circuits and share your own designs. The app requires a permission to access your account for authentication in EveryCIrcuit community.

Thanks to Prof. N. Maghari for technical discussions, feedback, and help with designing circuit examples.

Features:
+ Growing public library of community circuits
+ Animations of voltage waveforms and current flows
+ Animations of capacitor charges
+ Analog control knob adjusts circuit parameters
+ Automatic wire routing
+ Oscilloscope
+ Seamless DC and transient simulation
+ Single play/pause button controls simulation
+ Saving and loading of circuit schematic
+ Mobile simulation engine built from ground-up
+ Shake the phone to kick-start oscillators
+ Intuitive user interface
+ No Ads

Components:
+ Sources, signal generators
+ Controlled sources (VCVS, VCCS, CCVS, CCCS)
+ Resistors, capacitors, inductors, transformers
+ Potentiometer, lamp
+ Switches, SPST, SPDT
+ Diodes, Zener diodes, light emitting diodes (LED)
+ MOS transistors (MOSFET)
+ Bipolar junction transistors (BJT)
+ Ideal operational amplifier (opamp)
+ Digital logic gates, AND, OR, NOT, NAND, NOR, XOR, XNOR

Next:
+ More components

What’s New
Support of Intel x86 CPU architecture
Fixed an issue in user registration

Additional information
Updated November 26, 2013
Size Varies with device
Current Version Varies with device
Requires Android Varies with device
Content Rating Everyone

CadSoft Eagle Professional 7.1 Multilingual

EAGLE (Easily Applicable Graphical Layout Editor) is an ECAD program produced by Cadsoft in Germany. It is very commonly used by private electronics enthusiasts, because there is a very usable free demo version for nonprofit use and is available in English and German. Cadsoft has released versions for Microsoft Windows, Linux, and Mac OS X. EAGLE provides a schematic editor, for designing circuit diagrams and a tightly integrated PCB layout editor, which automatically starts off with all of the components required by the schematic. Components are manually arranged on the board, with the help of coloured lines showing the eventual connections between pins that are required by the schematic, to aid in finding a placement that will allow the most efficient track layout.

It also provides a good autorouter, which once the components have been placed will attempt to automatically find an optimal track layout to make the electrical connections. It does not always manage to find a way of routing all the signals, although it permits manual routing of critical paths such as power and high frequency lines before letting the autorouter handle the other connections.



EAGLE is very popular with hobbyists because the free demo is able to create usable PCBs. (Free ECADs from some companies are crippled so that they won’t save or won’t print.) The only limitations of boards made with the EAGLE demo are: 2 copper layers; a maximum size of 80mm x 100mm (½ Eurocard)(~3in x ~4in). The demo version of the schematic editor module can only create single-sheet schematics.

The licensing structure for the commercial version is very flexible. In order to use the demo version to make commercial products, it must be licensed for $49 USD. If more is needed, it is also possible to license the required extra modules (schematic capture, layout, autorouter) separately and simply purchase more if needs change.

CadSoft Eagle Professional

OS : Windows 7 / Vista / XP / 8
Language : English

Home Page - http://www.cadsoftusa.com/

CadSoft Eagle Professional 7.1